HomeDay 21

UVM Introduction

Universal Verification Methodology: the industry standard for testbench architecture.

What Is UVM?

UVM = reusable library of classes that structure testbenches. Instead of writing everything from scratch, inherit from UVM base classes.

UVM Hierarchy

// Inherit from uvm_component (testbench building block) class my_driver extends uvm_driver; function new(string name, uvm_component parent); super.new(name, parent); endfunction virtual task run_phase(uvm_phase phase); // Generate stimulus endtask endclass // Inherit from uvm_test (top-level test) class my_test extends uvm_test; function new(string name, uvm_component parent); super.new(name, parent); endfunction virtual function void build_phase(uvm_phase phase); super.build_phase(phase); // Create testbench components endfunction endclass

UVM Phases

Execution order:
1. build_phase: Create components
2. connect_phase: Wire them together
3. run_phase: Execute stimulus/check
4. extract_phase: Gather metrics
5. check_phase: Final verification
6. report_phase: Print results

Key Takeaways

Day 22: UVM components (drivers, monitors, agents).