EcrioniX Analog

The Art of Copying Current

In Analog IC Design, resistors are expensive (they take up too much silicon area). Instead of using resistors to bias every amplifier stage, engineers use **Current Mirrors**. A current mirror takes a precise **Reference Current ($I_{ref}$)** generated in one place and "copies" it to various other parts of the chip.

1. The Basic Current Mirror

The simplest current mirror consists of two transistors (typically MOSFETs) with their gates and sources connected.

  • M1 (Reference): Diode-connected (Drain shorted to Gate). This forces the transistor into saturation and generates a Gate-Source Voltage ($V_{GS}$) corresponding to the input current.
  • M2 (Mirror): Shares the same $V_{GS}$ as M1. Since the current through a MOSFET in saturation is largely determined by $V_{GS}$, M2 conducts the same current as M1 (assuming identical dimensions).

\[ I_{out} \approx I_{ref} \]

Limitation (Channel Length Modulation): Ideally, $I_{out}$ is constant. However, as the voltage at the output node ($V_{DS2}$) increases, the effective channel length shortens, causing $I_{out}$ to increase slightly. This means the circuit has a finite **Output Resistance**.

2. The Wilson Current Mirror

To fix the dependency on output voltage, the Wilson Mirror adds a third transistor (and sometimes a fourth) to create a negative feedback loop.

  • If $I_{out}$ tries to increase (due to voltage spikes), the feedback mechanism reduces the gate drive to the output transistor, forcing the current back down.
  • This results in an extremely high **Output Resistance**, making it a much better constant current source.

3. Key Parameters

  • Copying Accuracy: How close $I_{out}$ is to $I_{ref}$. Affected by transistor mismatch ($V_{th}$ variations).
  • Output Compliance Voltage: The minimum voltage required at the output node to keep the transistors in saturation. Wilson mirrors require higher voltage headroom than basic mirrors.
  • Output Impedance ($R_{out}$): A measure of how much the current changes with voltage. Higher is better. Ideally $\infty$.

Configuration

Topology
Supply Voltage ($V_{DD}$) 5.0 V
Reference Resistor ($R_{ref}$) 10 kΩ

Output Test Bench

Load Voltage ($V_{out}$) 3.0 V

Sweep this to test current stability (Early Effect).

Measurements

Ref Current ($I_{ref}$) 0.00 mA
Out Current ($I_{out}$) 0.00 mA
Error 0.0%
Circuit Schematic
VDD GND R_ref V I_out

Output Characteristic ($I_{out}$ vs $V_{out}$)