What is a pull-up resistor?

A pull-up resistor connects a signal line to VCC (supply voltage). When no device is actively driving the line, the resistor pulls the voltage to VCC, giving the line a default HIGH state. It prevents the signal from floating (undefined state) and limits current when a switch or open-drain device pulls the line LOW.

What is a pull-down resistor?

A pull-down resistor connects a signal line to GND. When no device is actively driving the line, the resistor pulls the voltage to 0V, giving the line a default LOW state. It prevents floating inputs and defines the signal level when a switch is open.

Why is a floating input dangerous?

A floating (undriven) input is connected to nothing — it is high-impedance and picks up electromagnetic noise from nearby signals, power lines, and radio frequency interference. This causes the voltage to randomly fluctuate, making the digital logic level undefined. It can cause unpredictable behavior, excess current draw, and even latch-up in CMOS circuits.

How do I choose the right resistor value?

Too low a value (strong pull-up, e.g. 100Ω): wastes too much current when the line is pulled low, can damage weak drivers. Too high a value (weak pull-up, e.g. 1MΩ): signal rises too slowly (RC time constant), susceptible to noise. Typical range: 1kΩ to 100kΩ. For I2C: 2.2kΩ to 10kΩ depending on bus speed and capacitance. For general GPIO buttons: 4.7kΩ to 47kΩ.

Why does I2C require pull-up resistors?

I2C uses open-drain signaling — devices can only pull lines LOW (SDA/SCL), they cannot drive them HIGH. Pull-up resistors are mandatory to return the bus to HIGH when no device is pulling it low. Without pull-ups, I2C cannot work. Typical values: 4.7kΩ for 100kHz standard mode, 2.2kΩ for 400kHz fast mode, and 1kΩ for 1MHz fast-mode plus.

When do you use pull-up vs pull-down?

Use pull-up when the default (idle) state should be HIGH: buttons that connect to GND when pressed, I2C/open-drain buses, active-low signals, UART idle state. Use pull-down when the default (idle) state should be LOW: buttons that connect to VCC when pressed, active-high control signals, GPIO boot configuration pins.

Pull-Up & Pull-Down Resistor Lab – Interactive Circuit Simulator

Why Pull Resistors Are Needed

⬆ Pull-Up Resistor

Connects signal to VCC through a resistor. Default state = HIGH. When a switch or open-drain device pulls the line LOW, current flows through R and the voltage drops to 0V (I = VCC/R). Used with active-low signals, buttons that short to GND, and I2C buses.

⬇ Pull-Down Resistor

Connects signal to GND through a resistor. Default state = LOW. When a switch pulls the line to VCC, current flows through R and the voltage rises. Used with active-high signals, buttons that connect to VCC, and boot configuration pins.

⚠ The Floating Input Problem

A CMOS input draws almost no current — it's high-impedance. With nothing connected, the input "floats" and picks up electromagnetic noise. The gate randomly toggles, causing unpredictable behavior, wasted power (both PMOS and NMOS conducting simultaneously = shoot-through current), and potential latch-up.

Ω Choosing the Value

Too low (100Ω–1kΩ): Wastes current (milliamps), can overload weak open-drain drivers, generates heat.

Too high (>100kΩ): Slow rise time (RC delay), susceptible to noise, insufficient to overcome leakage.

Sweet spot: 4.7kΩ–47kΩ for GPIO. 1kΩ–10kΩ for I2C.

Resistor value formula: When switch is pressed (pull-up), I = VCC / R. At VCC=3.3V and R=10kΩ → I = 0.33 mA, P = 1.09 mW. At R=1kΩ → I = 3.3 mA, P = 10.9 mW (10× more waste). Change the resistor value above and watch the metrics update.

I2C Open-Drain — Why Pull-Ups Are Mandatory

I2C uses open-drain outputs — devices can only pull SDA/SCL LOW by connecting them to GND through an internal NMOS transistor. They cannot drive the line HIGH. The pull-up resistors are the only mechanism to bring the bus back to HIGH when all devices release the line. This enables the Wired-AND property: if any device holds a line LOW, it stays LOW regardless of what others do. This is how I2C arbitration and clock stretching work.

When to Use Pull-Up vs Pull-Down

Use Case	Type	Typical Value	Reason
Push button → GND	Pull-Up	10–47 kΩ	Default HIGH, button press → LOW (active-low)
I2C SDA / SCL	Pull-Up	1–10 kΩ	Open-drain bus; must return to HIGH when released
UART RX idle	Pull-Up	10 kΩ	UART idle state is HIGH (mark); prevent noise on undriven line
RESET / active-low enable	Pull-Up	4.7–47 kΩ	Default = not reset (HIGH); pull LOW to assert
Push button → VCC	Pull-Down	10–47 kΩ	Default LOW, button press → HIGH (active-high)
Boot config pins	Pull-Down	10 kΩ	Default boot mode = LOW; strap HIGH to change mode
MOSFET gate	Pull-Down	10 kΩ	Ensure gate = 0V when driver is off; prevent false turn-on
SPI CS# (chip select)	Pull-Up	10 kΩ	CS# is active-low; default = deselected (HIGH)

Internal Pull-Up/Down in Verilog & FPGA

verilog / systemverilog · internal pull resistors

// ── Verilog: tri-state bus with pull-up ──────────────────────────
// 'pullup' and 'pulldown' are primitive gate instances

wire sda;
pullup pu_sda (sda);      // weak pull-up on SDA line
pulldown pd_gnd (net_x);  // weak pull-down

// Assign to simulate open-drain driver:
assign sda = oe ? 1'b0 : 1'bz;  // drive 0 or float (Z = high-Z)

// ── SystemVerilog: GPIO port with pull ──────────────────────────
// Xilinx FPGA example — IOBUF primitive with pull
IOBUF #(
  .DRIVE(12),
  .IOSTANDARD("LVCMOS33"),
  .SLEW("SLOW")
) gpio_buf (
  .O  (gpio_in),      // data into fabric
  .IO (gpio_pad),     // bidirectional pad
  .I  (gpio_out),     // data from fabric
  .T  (~gpio_oe)      // output enable (active-low tristate)
);

// ── Xilinx constraints (XDC) ────────────────────────────────────
# Internal pull-up on a GPIO pin
set_property PULLUP    true [get_ports {btn_n}]
set_property PULLDOWN  true [get_ports {boot_cfg}]

# For Intel/Altera (QSF):
# set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to btn_n

// ── FPGA note ────────────────────────────────────────────────────
// Most FPGAs have weak internal pull-up/down (~50–100 kΩ typical).
// For I2C, always use external pull-ups (2.2–10 kΩ) — internal
// resistors are too weak for the required drive strength and speed.

Frequently Asked Questions

A pull-up resistor connects a signal line to VCC through a resistor. When no device is actively driving the line low, the resistor pulls the voltage up to VCC — giving the line a defined default HIGH state. When a switch or open-drain device pulls the line to GND, current flows through R (limited by the resistor) and the voltage drops to near 0V.

CMOS inputs are high-impedance (near zero current) — a floating pin has no defined voltage. It picks up electromagnetic interference and randomly oscillates between 0V and VCC. Worse: when the input voltage sits near the logic threshold (VCC/2), both the PMOS and NMOS transistors inside the gate partially conduct simultaneously, creating a direct path from VCC to GND. This shoot-through current wastes power and can damage the chip over time.

Too low (e.g. 100Ω): Wastes milliamps of current when the line is pulled low, can overload weak drivers, generates heat.
Too high (e.g. 1MΩ): The RC time constant with stray capacitance causes slow signal edges, susceptible to noise.
General rule: 4.7kΩ–47kΩ for push buttons and GPIO. 1kΩ–10kΩ for I2C (speed-dependent). Use the calculator above to see current and power for any value.

I2C uses open-drain signaling — devices can only pull SDA and SCL LOW (by enabling an internal NMOS transistor to GND). They cannot actively drive the lines HIGH. Pull-up resistors are the only mechanism to return the bus to HIGH when all devices release the line. Without pull-ups, the bus cannot go HIGH and I2C communication fails. Internal FPGA/MCU pull-ups (~50kΩ–100kΩ) are too weak for reliable I2C at 100kHz+ and must be replaced with external resistors.

Yes — virtually all modern microcontrollers (STM32, ESP32, ATmega, RP2040, etc.) have configurable internal pull-up and pull-down resistors on GPIO pins, typically 20kΩ–100kΩ. These are sufficient for buttons and low-speed signals. For I2C, SPI at high speeds, or driving long traces, always add external pull resistors with the correct value for your bus speed and capacitance.

A strong pull uses a low resistance value (1kΩ–4.7kΩ): faster rise time, less susceptible to noise, but draws more current. A weak pull uses high resistance (47kΩ–100kΩ+): very little current, but slower edges and more noise-sensitive. "Weak" also describes internal FPGA/MCU pull resistors (~50–100kΩ). The terms are relative — choose based on your speed, power budget, and noise environment.

Pull-Up & Pull-Down Resistor Lab

Why Pull Resistors Are Needed

⬆ Pull-Up Resistor

⬇ Pull-Down Resistor

⚠ The Floating Input Problem

Ω Choosing the Value

I2C Open-Drain — Why Pull-Ups Are Mandatory

When to Use Pull-Up vs Pull-Down

Internal Pull-Up/Down in Verilog & FPGA

Frequently Asked Questions

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