Topic 15 · Digital Electronics

Number Systems
Binary · Hex · 2's Complement

From counting in binary to IEEE 754 floating point — the complete foundation every digital designer must master.

BinaryOctalHexadecimal BCD2's ComplementIEEE 754Overflow Detection

Number Base Systems

BaseNameDigitsVerilog PrefixExample: 42
2Binary0–1'b00101010
8Octal0–7'o052
10Decimal0–9'd42
16Hexadecimal0–9, A–F'h2A
Why hex? Each hex digit = exactly 4 binary bits. A 32-bit value shrinks from 32 binary characters to 8 hex characters — 4× more compact. Every register, address, and opcode you'll ever read in RTL design is shown in hex.

Positional Value

Each digit position carries weight = baseposition (rightmost = position 0)

Binary 1011 = 1×2³ + 0×2² + 1×2¹ + 1×2⁰ = 8+0+2+1 = 11

Hex 0x1F = 1×16 + 15×1 = 31

BCD 0011 1001 = digit 3, digit 9 = 39

Interactive Multi-Base Converter

8-bit Binary View (bits 7–0)

2's Complement (8-bit signed interpretation)

Original:
1's complement:
2's complement:

Signed Number Representations (8-bit)

Format+5−5RangeZeros
Sign-Magnitude0000 01011000 0101−127 to +127Two (+0, −0)
1's Complement0000 01011111 1010−127 to +127Two
2's Complement0000 01011111 1011−128 to +127One ✓
Fast negation trick: Scan right-to-left — copy all trailing 0s and the first 1 bit, then flip all remaining bits. Example: 01101000 → copy trailing 1000 → flip the rest → 10011000 = −104.

2's Complement Arithmetic Examples

OperationBinaryDecimal check
+5 + +30000 0101 + 0000 0011 = 0000 1000= +8 ✓
+5 + (−3)0000 0101 + 1111 1101 = [1]0000 0010= +2 ✓ (discard carry)
(−5) + (−3)1111 1011 + 1111 1101 = [1]1111 1000= −8 ✓
+70 + +70 (overflow!)0100 0110 + 0100 0110 = 1000 1100= −116 ✗ Overflow

Overflow detection: carry_in to MSB XOR carry_out from MSB = 1

BCD — Binary Coded Decimal

DecimalBCD (4-bit groups)Pure Binary
000000000
910011001
100001 00000000 1010
390011 10010010 0111
991001 10010110 0011
BCD uses only 0000–1001. If BCD addition result > 9 or generates a carry, add 0110 (6) to that digit to correct it. Used in: 7-segment displays, financial arithmetic, legacy IBM systems.

IEEE 754 Floating Point

S
1 bit
Exponent (biased 127)
8 bits
Mantissa (implicit leading 1)
23 bits

Value = (−1)S × 2Exponent − 127 × 1.Mantissa

FormatTotal bitsExponentMantissaApproximate range
Half (fp16)16510±65504
BF16 (brain float)1687Same as float32
Single (float32)32823±3.4×10³⁸
Double (float64)641152±1.8×10³⁰⁸

Example: +13.0 → IEEE 754

// +13.0 in IEEE 754 single precision
// 13 decimal = 1101 binary = 1.101 × 2³
// Sign     = 0
// Exponent = 3 + 127 = 130 = 10000010
// Mantissa = 101 + 20 zeros
// Bits: 0 10000010 10100000000000000000000
// Hex:  0x41500000

// Verilog: bit-field inspection
logic [31:0] f = 32'h41500000;
initial $display("sign=%b exp=%0d mant=%b",
  f[31], f[30:23]-127, f[22:0]);
// Output: sign=0 exp=3 mant=10100000000000000000000

Verilog Number Literals & Signed Arithmetic

// Format: [width]'[base][value]
logic [7:0] a;
a = 8'd42;        // decimal
a = 8'b00101010;  // binary
a = 8'h2A;        // hex
a = 8'o52;        // octal
a = 8'hXX;        // unknown (X)
a = 8'hZZ;        // high-impedance (Z)

// Signed declaration
logic signed [7:0] s = -8'sd5;   // -5 → 8'b11111011

// Overflow detection (2's complement)
logic [7:0] a8, b8, sum8;
logic        cin, cout, overflow;
assign {cout, sum8} = a8 + b8 + cin;
assign overflow = cin ^ cout; // V flag

// BCD add with correction
function automatic [4:0] bcd_add_digit;
  input [3:0] a, b; input cin;
  logic [4:0] t;
  t = a + b + cin;
  if(t > 9) t = t + 6;
  return t;
endfunction

Quick Reference — Hex to Binary

HexBinaryHexBinary
0000081000
1000191001
20010A1010
30011B1011
40100C1100
50101D1101
60110E1110
70111F1111

Frequently Asked Questions

How do you convert binary to 2's complement?

Invert all bits (1's complement), then add 1. For +5 = 0000 0101 → 1111 1010 → +1 → 1111 1011 = −5.

Why does hardware use 2's complement over sign-magnitude?

Same adder hardware for add and subtract, single zero representation, carry-out signals overflow directly. Three wins that make ALU design dramatically simpler.

What are BCD's use cases today?

7-segment display drivers, financial/banking systems where exact decimal rounding matters, embedded clocks/timers (RTC chips store time in BCD), legacy PLC systems.

How do you detect overflow in 2's complement addition?

Overflow = carry_in_to_MSB XOR carry_out_from_MSB. In Verilog: assign ov = cin ^ cout; Also: two positives sum to negative, or two negatives sum to positive → overflow.