Quiz Show Buzzer Lockout

Verilog problems / Fun & Games

What you must build

Build a 4-player quiz buzzer: whoever presses first wins and locks out everyone else until the host resets — first-to-press, not round-robin.

Engineers use “Quiz Show Buzzer Lockout” as a building block in fun & games. Interviewers ask for the same ports and the same corner cases this judge covers. Completing it in the browser is the same skill as writing synthesizable RTL at work, minus the EDA license.

Port contract

The judge instantiates exactly these ports. Extra ports or a different module name fail to elaborate.

How to approach this kata

This is a medium kata: you will need sequential logic or a small FSM. Decide what is registered versus combinational before you type. Reset polarity and clock edge must match the spec; the judge will fail you on the first mismatched cycle.

Hidden tests instantiate top_module, drive the ports, and compare every sample against a golden model. They do not grade coding style. They do grade X/Z, off-by-one counters, and ignoring enables. Sign in only when you want the run saved on the leaderboard — the specification below is public.

Starter shape

Copy this skeleton into the editor (or press Reset starter). Fill the body; do not rename the module.

module top_module(
  input  clk,
  input  rst,
  input  [3:0] buzz,
  output reg [3:0] winner,
  output reg locked
);

  // Your code here — first cycle any buzz bit is set (while unlocked), latch a one-hot winner
  // (lowest index wins ties) and set locked; ignore all further buzz activity until reset.

endmodule

Why this shows up in interviews

Quiz Show Buzzer Lockout sits under Fun & Games (sequential, arbiter, game-logic). Concept: Once any player buzzes in, the system must latch that winner and completely ignore every subsequent buzz until reset: if(!locked && |buzz) begin locked<=1; winner<=...; end . Simultaneous presses in the same cycle need a fixed tie-break (lowest player index wins here). The critical guard is !locked — drop it and the buzzer keeps updating winner on every later press even after the round is supposedly locked, letting a slower player steal the win from whoever actually buzzed in first.

A passing solution is synthesizable intent: no delays in the DUT, no initial blocks inside top_module, and no reference to testbench tasks. Use blocking assignments only in combinational always blocks; use non-blocking for registers clocked by clk.

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