IIT Madras' family of open-source RISC-V processors — designed in India, fabricated in India, and free for anyone to use. Here's what SHAKTI is, its core classes, the real chips it has produced, and why it matters.
SHAKTI is an ambitious open-source initiative from the RISE group (Reconfigurable Intelligent Systems Engineering) at IIT Madras to build an indigenous, industrial-grade family of microprocessors. Instead of licensing a foreign processor design, SHAKTI designs its own cores from scratch — and gives them away under open licences for academia, startups and government alike.
The foundation is the RISC-V instruction set: a free, open ISA that anyone can implement without royalties or permission (unlike ARM or x86). SHAKTI builds a whole spectrum of RISC-V cores, from a tiny microcontroller you could put in a smart meter all the way up to research designs aimed at servers. If you're new to the open-ISA idea, our RISC-V vs ARM guide is a great primer.
Almost every chip in the world depends on processor IP owned by a few foreign companies. For a country that wants strategic and technological self-reliance, that's a vulnerability — in defence, telecom, space and critical infrastructure you may not want a black-box core you can't audit or are forbidden to modify. SHAKTI tackles this head-on:
It sits squarely inside the broader global push for semiconductor sovereignty that's reshaping the industry.
SHAKTI isn't one chip — it's a family, each class tuned for a different point on the power/performance scale. They share a common RISC-V base so software and tooling carry across the range.
| Class | Target | Notes |
|---|---|---|
| E-class | Microcontrollers, IoT, low power | 32/64-bit, in-order, smallest core; supports RISC-V extensions |
| C-class | General-purpose, embedded & desktop-class | 64-bit, in-order, Linux-capable; the mainstream workhorse |
| I-class | High performance, mobile/compute | Out-of-order, superscalar, multi-core ambitions |
| M / S / H / T | Mobile, server, HPC, experimental/secure | Research/roadmap classes (e.g. tagged-memory security in T-class) |
SHAKTI is not just RTL on GitHub — it has produced real, working chips, and crucially they were fabricated in India at ISRO's Semi-Conductor Laboratory (SCL), Chandigarh, proving an end-to-end indigenous flow.
| Chip | Core | Process | Speed |
|---|---|---|---|
| Moushik | E-class SoC | SCL 180 nm | ~100 MHz |
| RIMO | C-class SoC | SCL 180 nm | ~70 MHz |
180 nm and tens of MHz won't trouble a flagship smartphone — but that's not the point. These chips prove a country can specify, design, verify and manufacture a processor entirely within its own borders and institutions. That capability — not the clock speed — is the milestone. The cores themselves can also be synthesised onto FPGAs and ported to more advanced foundry nodes.
Most of SHAKTI's RTL is written not in plain Verilog but in Bluespec System Verilog (BSV) — a high-level hardware description language. BSV lets designers express hardware as modular, heavily parameterized components with clean interfaces, then compiles down to synthesizable Verilog.
Why does that matter for a processor family? Because maintaining E, C and I cores by hand in low-level RTL would be a nightmare. With BSV's parameterization, the team can reconfigure or extend a core — change pipeline depth, add an extension, swap a cache — without rewriting everything. It's the modularity that makes a whole spectrum of cores practical from shared building blocks. (If you're learning RTL, you can experiment with the generated-Verilog mindset in our online Verilog simulator.)
Writing a CPU directly in Verilog is like cooking every dish from raw ingredients each time. BSV is like having well-tested, adjustable recipes with knobs — "make it 4-wide," "add this cache" — so you can produce many related dishes (E/C/I cores) consistently, fast, without starting over.
Everything about SHAKTI is meant to be used, not just admired:
For learners, SHAKTI is a rare chance to study a real, complete, auditable processor end to end — something proprietary cores never allow.
SHAKTI is a genuine achievement, but worth framing honestly. Its taped-out chips are at mature nodes (180 nm) and modest clock speeds — they are proofs of capability and great for embedded, strategic and educational use, not yet competitors to leading-edge mobile or server CPUs fabricated at 3–5 nm. The high-performance classes are still maturing, and a full commercial ecosystem (compilers, OS support, peripherals, volume fabs) takes years to build.
But the trajectory is what counts: an open ISA, indigenous design talent, domestic fabrication, and a startup ecosystem forming around it. Combined with India's wider semiconductor mission, SHAKTI is a foundational piece of a long game. Always check the project's latest releases for current specs, as the program evolves quickly.
SHAKTI is IIT Madras' family of open-source RISC-V processors — from the tiny E-class MCU to the Linux-capable C-class and high-performance I-class — written in modular Bluespec. It has produced real Indian-fabricated silicon (Moushik, RIMO at ISRO's SCL), proving an end-to-end indigenous flow. Its value is sovereignty, openness and talent more than raw GHz — a long-term foundation for India's chip independence.
IIT Madras' open-source program building a family of RISC-V processors for indigenous, royalty-free, auditable computing.
E-class (MCU/IoT), C-class (64-bit, Linux-capable), I-class (out-of-order, high performance), plus research classes M/S/H/T.
Yes — Moushik (E-class) and RIMO (C-class), both fabricated at ISRO's SCL Chandigarh on 180 nm.
BSV's modular, parameterized design makes it practical to maintain and extend a whole family of cores from shared blocks.
It advances India's semiconductor self-reliance with an open, auditable, domestically fabricated processor.
Related: RISC-V vs ARM · What Is an AI Chip? · The Semiconductor Boom · FPGA from Scratch · VLSI Hub
Sources: SHAKTI project (shakti.org.in), IIT Madras RISE group, and public teardown/coverage of Moushik & RIMO. Specs are representative and evolve — verify with the project's latest releases.