FPGA from Scratch

A chip you can reprogram into any digital circuit you want. We start from "what even is an FPGA?" and build all the way to UART, timing closure and soft-core CPUs — one short, hands-on lesson at a time.

▶ Start with Day 1 — What is an FPGA?

FPGAs power 5G base stations, AI accelerators, spacecraft, video gear and the lab benches of every hardware engineer — because they let you build custom digital hardware in software, with no factory required. This course assumes zero FPGA experience. If you can follow our Verilog basics you can follow this. Each lesson is plain-English, with diagrams, real HDL code and a quick self-check. New lessons publish regularly — bookmark this page.

PHASE 1

FPGA Foundations

Day 1What is an FPGA? Reconfigurable hardware vs CPU & ASICLive Day 2Inside an FPGA — LUTs, flip-flops & CLBsLive Day 3Hard blocks — Block RAM, DSP slices & clockingLive Day 4The FPGA design flow — RTL to bitstreamLive Day 5Verilog vs VHDL & your first moduleLive Day 6Combinational logic in HDLLive Day 7Sequential logic, clocks & resetsLive

PHASE 2

Your First Real Designs

Day 8Project: blink an LEDLive Day 9Counters & clock dividersLive Day 10Debouncing a push buttonLive Day 11Finite State Machines on FPGALive Day 12Seven-segment display driverLive Day 13Building a UART transmitterLive Day 14UART receiver — oversampling & mid-bit samplingLive Day 15Using Block RAM & ROMsLive

PHASE 3

Timing, Clocks & Verification

Day 16Timing constraints & timing closureLive Day 17Clock domain crossing on FPGALive Day 18PLLs / MMCMs — generating clocksLive Day 19DSP — multipliers, MACs & filtersLive Day 20Testbenches & simulation techniquesLive

PHASE 4

Real Systems

Day 21SPI master controllerLive Day 22I2C master controllerLive Day 23VGA / HDMI video outputLive Day 24AXI & soft-core processorsLive Day 25Optimisation — pipelining, area & speedLive

New lessons publish regularly. Finished the ARM course? This is the perfect next step. Also see the ARM Architecture course and the online Verilog simulator.