What is a LUT in an FPGA?

A LUT (Look-Up Table) is the fundamental building block of an FPGA. A 4-input LUT can implement any Boolean logic function with up to 4 inputs — it works like a tiny truth table stored in memory. Modern FPGAs contain hundreds of thousands to millions of LUTs, each paired with a flip-flop to implement sequential logic.

What language is used to program an FPGA?

The primary languages are Verilog and VHDL (Hardware Description Languages). SystemVerilog is a superset of Verilog widely used for both design and verification. High-Level Synthesis (HLS) tools like Xilinx Vitis HLS also allow engineers to write in C/C++ and compile it to HDL, though with less control over the final hardware.

The main FPGA vendors are AMD (which acquired Xilinx in 2022), Intel (which acquired Altera in 2015), Lattice Semiconductor (low-power FPGAs), and Microchip Technology (formerly Microsemi/Actel, known for space-grade FPGAs). AMD/Xilinx and Intel/Altera together hold the majority of the market.

What is an FPGA? Explained in Simple Terms

Q: What does FPGA stand for?

FPGA stands for Field-Programmable Gate Array. 'Field-programmable' means it can be configured after it leaves the factory — in the field — as opposed to a fixed chip like an ASIC. 'Gate array' refers to the large array of logic gates and other programmable elements inside it.

Q: What is the difference between an FPGA and an ASIC?

An ASIC (Application-Specific Integrated Circuit) is a chip permanently designed for one purpose — once manufactured, its logic cannot change. An FPGA can be reprogrammed any number of times. ASICs are faster and cheaper at high volumes; FPGAs are flexible and have no manufacturing cost, making them ideal for prototyping and low-volume products.

Q: How is an FPGA programmed?

An FPGA is programmed using a Hardware Description Language (HDL) like Verilog or VHDL — not software like C or Python. The HDL code describes the logic circuit you want. EDA tools then synthesise this into a netlist, perform place-and-route to map it onto the FPGA's physical resources, and generate a bitstream file. The bitstream is downloaded to the FPGA, configuring its LUTs and interconnects to implement your circuit.

Q: What are FPGAs used for?

FPGAs are used for ASIC prototyping, 5G base stations, radar and aerospace systems, high-frequency trading, real-time video processing, AI inference acceleration, software-defined radio, and any application needing custom hardware logic with flexibility to update in the field.

Q: Is an FPGA faster than a CPU?

For the right tasks, yes. An FPGA can implement a custom hardware pipeline that processes data in parallel with no OS overhead, no cache misses, and deterministic timing — outperforming a CPU by 10–100x for specific workloads like packet processing, signal processing, and inference. For general sequential tasks, a CPU is faster.

The Simple Definition

An FPGA (Field-Programmable Gate Array) is a chip that comes blank from the factory — a sea of programmable logic blocks and wires — that you can configure to implement any digital circuit you design.

Unlike a CPU (which is a fixed chip that executes software instructions) or an ASIC (which is permanently wired for one job), an FPGA can be reprogrammed thousands of times. You describe the circuit you want in code, and the FPGA physically becomes that circuit.

One-line definition

An FPGA is a blank chip made of thousands of tiny reconfigurable logic blocks — you write code to wire them together into any digital circuit you want, and you can change your mind tomorrow.

1984

Invented (Xilinx)

4.5M+

Logic cells (high-end)

∞

Reprogramming cycles

Real-world analogy

Think of an FPGA like a whiteboard covered in LEGO connectors. The LEGO bricks (logic blocks) are all there — you just snap them together in the pattern you want. Tomorrow you pull them apart and build something completely different. An ASIC is like a plastic toy moulded in one fixed shape forever. A CPU is like a Swiss Army knife — good at many things, master of none.

FPGA vs ASIC vs Microcontroller

These three options come up whenever an engineer needs to implement custom digital logic. Here is how they compare:

Microcontroller (MCU)

Fixed hardware, runs software
Very easy to program (C, Python)
Low cost, widely available
Sequential execution — one instruction at a time
Best for: IoT sensors, motor control, simple products
Example: Arduino, STM32, ESP32

FPGA

Reconfigurable hardware — you define the circuit
Steeper learning curve (HDL: Verilog/VHDL)
Moderate cost, no NRE fee
True parallelism — all logic runs simultaneously
Best for: prototyping, comms, signal processing, low-volume custom logic
Example: Xilinx Artix, Intel Cyclone

ASIC

Permanent custom silicon — cannot change
Very complex to design (months to years)
High NRE cost ($1M–$100M+), cheap per unit at volume
Fastest and most power-efficient option
Best for: smartphones, CPUs, GPUs, mass-market products
Example: Apple M4, NVIDIA H100

The FPGA sits between the flexibility of software and the performance of dedicated silicon. It is slower and less power-efficient than an ASIC, but infinitely more flexible — and it needs no expensive manufacturing process to change.

What's Inside an FPGA?

An FPGA is not empty space — it is packed with specialised hardware blocks. You configure how they connect, not what they are. Here are the key components:

LUT — Look-Up Table

The fundamental logic block. A 6-input LUT can implement any Boolean function of up to 6 inputs — it works like a tiny truth table stored in SRAM. Modern FPGAs have hundreds of thousands of LUTs. This is where your logic gates, muxes, and arithmetic live.

Flip-Flop (FF / Register)

Each LUT is paired with one or more flip-flops for storing state. This is what makes sequential logic (counters, FSMs, pipelines) possible. Without flip-flops, every circuit would be purely combinational.

BRAM — Block RAM

Hardened memory blocks embedded throughout the FPGA fabric. Each BRAM typically stores 18Kb or 36Kb. Used for FIFOs, lookup tables, packet buffers, frame stores — anything needing on-chip memory without burning LUTs.

DSP Blocks

Dedicated multiply-accumulate (MAC) hardware. Instead of building a multiplier out of hundreds of LUTs (slow and wasteful), you use a hardened DSP block. Essential for signal processing (filters, FFTs) and AI inference on FPGAs.

Programmable Interconnect

The sea of wires and switches between all the blocks. This is the "gate array" in FPGA — a grid of configurable routing resources. The bitstream configures which switches are closed, deciding how signals flow between LUTs, BRAMs, and DSPs.

I/O Blocks (IOB)

Interface between the FPGA's internal logic and external pins. Configurable for different voltage standards (3.3V, 1.8V, LVDS, etc.), drive strengths, and termination. This is how the FPGA connects to external sensors, memories, and chips.

PLL / MMCM

Phase-Locked Loops generate precise clock frequencies from a reference clock. They can multiply, divide, or shift the phase of a clock — critical for running different parts of a design at different speeds or meeting timing constraints.

Hard IP Blocks

Pre-built silicon blocks for common interfaces — PCIe controllers, Ethernet MACs, high-speed transceivers (GTX/GTP), DRAM controllers, and even embedded ARM cores (in Xilinx Zynq / Intel SoC FPGAs). Far faster and smaller than building the same thing in LUTs.

How Is an FPGA Programmed?

Programming an FPGA is fundamentally different from programming a CPU. You are not writing instructions — you are describing a circuit. The flow looks like this:

1

Write HDL (Verilog / VHDL) You describe the hardware you want using a Hardware Description Language. This looks like code but actually specifies logic gates, registers, and their connections — not a sequence of instructions.

2

Synthesis EDA tools (Xilinx Vivado, Intel Quartus) convert your HDL into a netlist — a description of which LUTs, flip-flops, and DSPs are needed and how they connect. This is like a compiler, but for hardware.

3

Place & Route The tool maps each LUT and flip-flop to a physical location on the FPGA die and routes the wires between them. It must meet timing constraints — signals must arrive within the clock period.

4

Generate Bitstream The final output is a bitstream — a binary configuration file (typically a few megabytes) that encodes every switch setting in the FPGA's interconnect and every LUT's truth table.

5

Program the FPGA The bitstream is downloaded to the FPGA via JTAG (or flash memory for persistent configuration). The FPGA loads it into its internal SRAM — and your circuit is now live, running at hardware speed.

Important

Most FPGAs store their configuration in volatile SRAM — they lose it when powered off. A small external flash chip holds the bitstream and reprograms the FPGA every time it boots. This also means you can update an FPGA's "firmware" in the field by writing a new bitstream to that flash chip.

What Are FPGAs Used For?

FPGAs thrive wherever you need custom hardware logic, real-time performance, and the ability to update the design after deployment:

🔬

ASIC Prototyping

Before taping out a $10M chip, companies map the RTL onto FPGAs to run at near-real speed, find bugs, and validate software drivers. Months of testing on FPGA saves years of re-spins.

📡

5G & Communications

Base stations process millions of packets per second using custom forward error correction and beam-forming algorithms. FPGAs implement these at wire speed with deterministic latency — something a CPU cannot match.

✈️

Aerospace & Defence

Radar signal processing, missile guidance, satellite comms, and avionics use FPGAs for radiation-hardened, deterministic real-time logic that can be updated in the field without replacing hardware.

📈

High-Frequency Trading

Trading firms use FPGAs to parse market data feeds and execute trades in under 1 microsecond — latency a CPU running Linux simply cannot achieve. FPGA logic bypasses the OS entirely.

🎬

Video & Image Processing

Real-time 8K video encoding, camera ISP pipelines, medical imaging (MRI/CT reconstruction), and broadcast equipment use FPGAs for pixel-parallel processing at rates no GPU can match with the same latency.

🤖

AI Inference Acceleration

Cloud providers (Microsoft Azure, Alibaba Cloud) deploy FPGAs for low-latency AI inference. Microsoft's Project Brainwave uses FPGAs to serve neural networks at sub-millisecond latency in Bing search.

FPGA vs ASIC — When to Use Which

Both implement the same digital logic — the choice is about volume, performance requirements, and how much the design might change:

Use FPGA when...

Volume is low (under ~50,000 units)
Design may need updates after deployment
Prototyping before ASIC tape-out
Time to market is critical (no 6-month fab wait)
Non-recurring engineering (NRE) budget is limited
Standards may evolve (5G, networking protocols)

Use ASIC when...

Volume is very high (millions of units)
Maximum power efficiency is required (mobile, IoT)
Absolute maximum performance needed
Design is frozen and well-validated
Die size matters (ASIC is 10–30x more dense)
Example: smartphone SoC, GPU, network switch chip

Rule of thumb

Below ~50K units/year: FPGA wins on total cost. Above ~500K units/year: ASIC NRE is amortised and cost-per-unit drops dramatically. In between: it depends on your margins, update requirements, and performance needs.

Who Makes FPGAs?

The FPGA market is dominated by two companies that have both been acquired by chip giants:

AMD / Xilinx

Artix, Kintex, Virtex, Zynq, Versal

Market leader (~50% share). Acquired by AMD in 2022. Virtex UltraScale+ is the highest-end family. Zynq combines FPGA fabric with ARM cores. Versal integrates AI engines for ML inference.

Intel / Altera

Cyclone, Arria, Stratix, Agilex

Second largest (~35% share). Acquired by Intel in 2015. Cyclone is the entry-level family. Stratix/Agilex target high-performance datacenter and comms. Includes embedded ARM in SoC variants.

Lattice Semiconductor

iCE40, ECP5, CrossLink, Nexus

Specialises in small, low-power FPGAs. iCE40 is beloved in the open-source community (fully open toolchain). Used in mobile, IoT, industrial edge applications. Not competing with Xilinx/Intel at the high end.

Microchip / Microsemi

PolarFire, RTG4, SmartFusion

Focuses on radiation-hardened and security-focused FPGAs for aerospace, defence, and space applications. PolarFire uses flash-based config (non-volatile — no external flash chip needed).

There is also a growing open-source ecosystem — the IceStorm toolchain (for Lattice iCE40) and nextpnr give hobbyists a fully open-source FPGA design flow with no proprietary vendor tools required.

Frequently Asked Questions

What does FPGA stand for?

Field-Programmable Gate Array. "Field-programmable" means configurable after manufacture — in the field, by the end user. "Gate array" describes the underlying structure: a grid of logic gates and interconnects. The concept was invented by Ross Freeman and Bernard Vonderschmitt at Xilinx in 1984.

What is the difference between an FPGA and an ASIC?

An ASIC is custom silicon fabricated for one specific purpose — its logic is permanently etched in metal layers during manufacturing and cannot be changed. It is fast, power-efficient, and cheap per unit at high volume, but costs millions to design and fabricate.

An FPGA uses programmable SRAM cells to configure its logic and routing after manufacture. It is slower (~3–5x) and less efficient (~10x) than an ASIC for the same function, but can be reprogrammed infinitely, requires no fab NRE cost, and ships immediately. Most ASICs are validated on FPGAs before tape-out.

What language do you use to program an FPGA?

The standard languages are Verilog and VHDL — Hardware Description Languages (HDLs). You describe circuit behaviour, not a sequence of instructions. SystemVerilog (a superset of Verilog) is the modern industry standard.

High-Level Synthesis (HLS) tools like Xilinx Vitis HLS and Intel HLS Compiler allow you to write in C/C++ and automatically generate RTL, though with less precise control over the resulting hardware.

What is a LUT and why does it matter?

A LUT (Look-Up Table) is the basic logic cell of an FPGA. A 6-input LUT stores 64 bits (2⁶) — one output value for every possible combination of 6 inputs. By programming those 64 bits, you can implement any Boolean function of up to 6 inputs: AND, OR, XOR, a full adder, a multiplexer, anything.

When vendor datasheets say "1.2 million logic cells," they are essentially counting LUT-FF pairs. More LUTs = more complex designs you can fit on the chip.

Is an FPGA faster than a CPU?

For specific parallel tasks, yes — dramatically faster. An FPGA implements logic as physical gates running all simultaneously. There is no fetch-decode-execute cycle, no OS scheduling, no cache misses, and no branch mispredictions.

For example, a custom network packet parser on an FPGA can process frames at wire speed (100 Gb/s) with sub-microsecond latency — a task a CPU server farm would struggle with. For general sequential tasks (browsing the web, running a database), a CPU wins comfortably.

Can an FPGA run an operating system?

Not the FPGA fabric itself — but SoC FPGAs (like Xilinx Zynq or Intel Cyclone V SoC) embed hardened ARM Cortex-A cores alongside the FPGA fabric on the same chip. The ARM cores run Linux or any RTOS normally, while the FPGA fabric handles the real-time hardware acceleration. This combination is extremely common in industrial, communications, and defence systems.

How long does it take to learn FPGA design?

With a digital electronics background, you can write simple Verilog and synthesise to an FPGA board in a few days. Building a competent understanding of timing closure, pipelining, and resource optimisation takes 3–6 months of hands-on practice. Mastering advanced topics (CDC, complex protocols, high-speed interfaces) takes years — it is a deep field.

Good starting points: Xilinx Artix-7 Basys 3 board (~$150), open-source iCE40 boards (~$40), or EDA Playground online simulator.

What is a bitstream?

A bitstream is the binary configuration file generated at the end of the FPGA design flow (after synthesis, place, and route). It encodes: which LUT truth tables are programmed, which routing switches are open or closed, and how all the I/O and clock resources are configured. Downloading the bitstream to the FPGA "programs" it — the chip becomes your circuit. On most FPGAs the bitstream is stored in volatile SRAM, so an external flash chip re-programs the device on every power-up.