What RISC-V instructions does this simulator support?

Question

Accepted Answer

This simulator supports the full RV32I base integer instruction set: R-type (add, sub, and, or, xor, sll, srl, sra, slt, sltu), I-type (addi, andi, ori, xori, slti, sltiu, slli, srli, srai), load instructions (lw, lh, lb, lhu, lbu), store instructions (sw, sh, sb), branch instructions (beq, bne, blt, bge, bltu, bgeu), jump instructions (jal, jalr), upper immediates (lui, auipc), and common pseudoinstructions (li, mv, j, ret, nop, call, not, neg).

RISC-V Assembly Simulator