PVT corners account for chip-to-chip variation. But two cells sitting 2mm apart on the same die can still behave differently due to local lithographic variation, thermal gradients, and IR drop. This is on-chip variation (OCV) — and without modelling it, STA would be dangerously optimistic. OCV, AOCV, and POCV are progressively more accurate (and more compute-intensive) ways to model this intra-die variation during timing analysis.
Even after selecting a PVT corner, cells across a single die do not all switch at exactly the same speed. Three physical effects drive intra-die variation:
The combined effect: a cell driving a critical path may be 5–10% slower than the Liberty nominal, while a cell on the same path’s clock network may be 5% faster. If STA doesn’t model this, the real slack is smaller than reported.
The simplest OCV approach is flat derating: multiply all cell delays on certain path types by a constant factor. For setup analysis:
This maximises the apparent timing gap: the data arrives later, the clock arrives earlier, which reduces setup slack — a conservative, safe approximation.
## Setup analysis: derate data path late, clock path early ## 5% derating is typical for 28nm; 8-10% for 16nm/7nm ## Data (launch) path: make late arrival pessimistically slow set_timing_derate -cell_delay -data -late 1.05 ## Clock (capture) path: make early arrival pessimistically fast set_timing_derate -cell_delay -clock -early 0.95 ## Also derate cell checks (setup time of the capture FF) set_timing_derate -cell_check -late 1.05 ## For hold analysis: reverse the derating direction ## Early data path (make fast data arrive even faster = worse hold) set_timing_derate -cell_delay -data -early 0.95 ## Late clock path (make clock arrive even later = worse hold) set_timing_derate -cell_delay -clock -late 1.05 ## Verify derating is active report_timing_derate
Flat OCV introduces an artificial pessimism. Consider a clock buffer that feeds both the launch flip-flop’s clock and the capture flip-flop’s clock (a shared or common clock path segment):
CPPR removes this double-counting on the shared path segment. It computes the pessimism on the common portion and adds it back to the slack (positive correction = slack recovery).
Flat OCV applies the same derating to a single-cell path and a 50-cell path. This is incorrect: a 50-cell path statistically averages out local variations much more than a single cell. AOCV uses depth-based derating tables that apply larger derating to shallow paths (high variation risk) and smaller derating to deep paths (variation averages out).
AOCV requires extra characterisation data from the foundry — a table indexed by path depth (number of cells) giving the appropriate derating sigma for each depth.
| OCV Type | Derating Method | Accuracy | Compute Cost | Typical Use |
|---|---|---|---|---|
| Flat OCV | Single multiplier applied to all cells equally | Conservative (over-pessimistic) | Very low | Synthesis, early-stage STA, 65nm+ |
| AOCV | Depth-indexed table: more cells = less derating | Better (physically motivated) | Low–medium | 28nm–16nm sign-off, post-layout STA |
| POCV | Statistical sigma per cell; propagated with RSS | Most accurate (statistical) | High | 16nm/7nm and below, final sign-off |
At 16nm and below, flat OCV is simultaneously too pessimistic for long paths (causing unnecessary timing closure effort) and potentially too optimistic for very short paths (single-cell paths with high local variation). POCV solves this by treating cell delay as a statistical random variable with a mean (from Liberty) and a sigma (from foundry characterisation).
For a path with N cells, POCV propagates the uncertainty using the root-sum-of-squares (RSS) formula:
σpath = √(σ¹² + σ²² + σ³² + ... + σN²)
The tool then reports timing at a specified sigma level (e.g., 3σ for 99.7% yield confidence). Short paths with fewer cells have smaller total sigma; long paths have larger total sigma (but it grows as √N, not N — so derating is less aggressive per cell for long paths).
OCV applies to both data paths and clock paths. The interaction with clock tree buffers is particularly important:
| Design Stage | Recommended OCV | Reason |
|---|---|---|
| RTL synthesis | Flat OCV (5–7%) | Fast runtime; rough estimate is fine at this stage |
| Pre-layout STA | Flat OCV (5–8%) | Estimated parasitics; full accuracy not needed |
| Post-layout sign-off (28nm+) | AOCV or Flat OCV + CPPR | More accurate per path depth; CPPR essential post-CTS |
| Post-layout sign-off (16nm/below) | POCV at 3σ+ | Physical variation too complex for flat derating; statistical method required |
| Automotive / safety-critical | POCV at 4σ or 5σ | Higher confidence required; ISO 26262 constraints |
Running post-CTS STA without CPPR enabled produces results that are artificially pessimistic by 30–100ps on typical clock paths. This leads to unnecessary timing closure work — chasing violations that would not exist with correct pessimism removal. Always verify CPPR is enabled: get_app_var timing_remove_clock_reconvergence_pessimism should return true.
OCV (On-Chip Variation) accounts for the fact that transistors across a single die vary in speed due to local manufacturing imperfections, thermal gradients, and IR drop. STA models this by applying derating factors: making the data path pessimistically slow and the clock path pessimistically fast (for setup analysis), widening the effective timing gap to ensure the chip meets timing even with intra-die variation.
CPPR (Common Path Pessimism Removal) corrects an over-pessimism introduced by OCV. When a clock buffer is shared by both launch and capture paths, OCV simultaneously models it as slow (for launch) and fast (for capture) — an impossibility. CPPR identifies the shared segments and removes the double-counted pessimism, typically recovering 30–100ps of slack. It must always be enabled for post-CTS STA.
Flat OCV applies one derating factor to all paths equally. AOCV applies depth-based derating — single-cell paths get large derating (one slow cell dominates), multi-cell paths get smaller derating (variation averages out). POCV treats delays as statistical variables with mean and sigma, propagating uncertainty with RSS and reporting timing at a specified sigma confidence level. POCV is most accurate and required at 16nm and below.
set_timing_derate is the PrimeTime/Tempus command to apply OCV derating. For setup: -cell_delay -data -late 1.05 makes the data path 5% slower; -cell_delay -clock -early 0.95 makes the capture clock 5% faster. The command applies separately to data paths, clock paths, and cell check times (setup/hold arcs).
POCV should be used at 16nm and below, where process variation is large enough that flat OCV becomes simultaneously too pessimistic on long paths (causing unnecessary closure work) and not accurate enough for short paths. POCV gives per-path statistical accuracy. It requires foundry-characterised sigma Liberty files and is configured with a confidence level (3σ standard, 4–5σ for automotive).