Top-3 Leaderboard Tracker

Verilog problems / Fun & Games

What you must build

Maintain the 3 highest scores seen so far in sorted order as new scores stream in — an insertion-sort shift register in miniature.

Engineers use “Top-3 Leaderboard Tracker” as a building block in fun & games. Interviewers ask for the same ports and the same corner cases this judge covers. Completing it in the browser is the same skill as writing synthesizable RTL at work, minus the EDA license.

Port contract

The judge instantiates exactly these ports. Extra ports or a different module name fail to elaborate.

How to approach this kata

This is a medium kata: you will need sequential logic or a small FSM. Decide what is registered versus combinational before you type. Reset polarity and clock edge must match the spec; the judge will fail you on the first mismatched cycle.

Hidden tests instantiate top_module, drive the ports, and compare every sample against a golden model. They do not grade coding style. They do grade X/Z, off-by-one counters, and ignoring enables. Sign in only when you want the run saved on the leaderboard — the specification below is public.

Starter shape

Copy this skeleton into the editor (or press Reset starter). Fill the body; do not rename the module.

module top_module(
  input  clk,
  input  rst,
  input  submit,
  input  [7:0] score,
  output reg [7:0] top1,
  output reg [7:0] top2,
  output reg [7:0] top3
);

  // Your code here — on submit, insert score into the sorted top-3, shifting lower entries down.

Why this shows up in interviews

Top-3 Leaderboard Tracker sits under Fun &amp; Games (sequential, comparator, datapath). Concept: Inserting a new high score means shifting everything below it down one slot before writing it in: a new #1 must push the old #1 down to #2 and the old #2 down to #3, all in the same cycle — if(score>top1) begin top3<=top2; top2<=top1; top1<=score; end . Forgetting the top3<=top2 shift is an easy one-line omission that looks harmless (top1 and top2 both still update correctly) but silently drops whatever used to be in third place the moment a new #1 arrives — the leaderboard quietly loses an entry instead of shifting it down.

A passing solution is synthesizable intent: no delays in the DUT, no initial blocks inside top_module, and no reference to testbench tasks. Use blocking assignments only in combinational always blocks; use non-blocking for registers clocked by clk.

Related problems

• Simon Says Sequence Checker — Check a player's button presses against a fixed 4-step target sequence, one press at a time — freeze on the first mistake, celebrate after the last correct press.
• Parking Meter Timer — A coin-fed countdown timer that flags a violation the instant time runs out and no more coins arrive — a real-world countdown-with-guard pattern.
• Leap Year Checker — Determine whether a given year is a leap year — the classic "divisible by 4, except by 100, except-except by 400" rule as combinational logic.
• FizzBuzz Encoder — The classic programming-interview puzzle, recast as combinational hardware: classify a number as Fizz, Buzz, FizzBuzz, or itself.

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