Welcome to Day 1. Before a single line of assembly, let's answer the simplest question — what actually is "ARM"? — and understand the one design idea that makes the whole architecture tick.
Here's the first thing that surprises people: Arm Holdings doesn't make any chips. It designs the architecture — the rules of how the processor works, its instructions, its registers — and the processor cores that implement those rules. Then it licenses those designs to other companies.
Apple, Qualcomm, Samsung, NVIDIA, Broadcom and hundreds of others take an ARM design, drop it into their own silicon alongside their custom parts (GPU, modem, accelerators), and manufacture it at a foundry like TSMC. So the chip in your iPhone (Apple's A-series), your Android (Qualcomm Snapdragon), and your Raspberry Pi all run the same ARM architecture — even though they're made by different companies.
Think of ARM like the blueprint and rulebook for an engine. Arm sells the blueprint. Carmakers (Apple, Qualcomm…) build their own cars around that engine, tuning it for their needs. ARM never opens a factory — it just designs the engine everyone agrees to use.
This IP-licensing business model is half the reason ARM took over the world. Any company can build a custom ARM chip without designing a CPU from scratch. We'll come back to why that matters.
ARM stands (originally) for Acorn RISC Machine, later Advanced RISC Machine. That middle word is the key concept of the entire course: RISC — Reduced Instruction Set Computer.
A CPU's "instruction set" is the vocabulary of commands it understands. There are two philosophies:
| RISC (ARM) | CISC (x86) |
|---|---|
| Few, simple instructions, each doing one small thing | Many, complex instructions, some doing a lot at once |
| Fixed length (e.g. 32-bit) — easy to decode | Variable length (1–15 bytes) — harder to decode |
| Memory touched only by load/store instructions | Instructions can operate directly on memory |
| Lots of registers; work happens in registers | Fewer registers historically |
| Simpler hardware → lower power, easy to pipeline | Complex hardware → more capable per instruction |
The trade-off: a RISC chip might need a few more instructions to do the same task, but each instruction is so simple that the hardware is smaller, faster to pipeline, and uses far less power. For a phone running on a battery, performance-per-watt wins — and that's exactly ARM's home turf.
ARM is a load/store architecture: the CPU can only do arithmetic and logic on values that are already in registers. To work on something in memory you must first load it into a register, operate on it, then store it back. This single rule shapes almost everything we'll learn. (We'll go deep on it in Day 10.)
Over 290 billion ARM-based chips have shipped — among the most successful processor architectures in history.
That scalability is why we mentioned the families — Cortex-A, Cortex-R, Cortex-M. Knowing which is which is exactly where we go next.
Test yourself before tomorrow:
Originally Acorn RISC Machine, later Advanced RISC Machine. The "RISC" part is the key design philosophy.
They optimise for different goals. ARM leads in performance-per-watt (mobile, embedded, now laptops/servers); x86 has a deep desktop/server legacy. The gap has narrowed a lot.
No. We start from zero and introduce assembly gradually from Phase 2. Today is purely conceptual.