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📚 FREE DAILY COURSE · BEGINNER → ADVANCED

ARM Architecture from Scratch

The processor inside your phone, your earbuds, and increasingly your laptop. We start from absolute zero and build all the way to AArch64, caches and TrustZone — one short lesson a day.

▶ Start with Day 1 — What is ARM?

This is a from-scratch course: no prior assembly or computer-architecture knowledge assumed. Each day is a focused, readable lesson that builds on the one before. By the end you'll understand how an ARM core is organised, how its instructions work, how it handles memory and interrupts, and what makes the modern 64-bit architecture tick. New lessons publish daily — bookmark this page.

PHASE 1

Foundations

Day 1What is ARM? RISC vs CISC, and why ARM is everywhereLive Day 2ARM processor families — Cortex-A, Cortex-R, Cortex-M & profilesLive Day 3The programmer's model — registers R0–R15 and the CPSRLive Day 4Memory, data types, alignment & endiannessLive Day 5Operating modes & exception levelsLive Day 6Instruction sets — ARM, Thumb, Thumb-2 and A64Live Day 7The pipeline — how an instruction actually flowsLive
PHASE 2

The Instruction Set

Day 8Data-processing instructions — MOV, ADD, SUB, logical opsLive Day 9The barrel shifter — ARM's secret weaponLive Day 10Load/store architecture & addressing modesLive Day 11Flags & conditional executionLive Day 12Branches, loops & control flowLive Day 13Multiply, divide & saturating arithmeticLive Day 14The stack — PUSH, POP and how it growsLive Day 15Subroutines & the AAPCS calling conventionLive Day 16The Thumb instruction set & code densityLive
PHASE 3

System & Memory

Day 17Exceptions & interrupts — IRQ, FIQ and the vector tableLive Day 18The NVIC — interrupts on Cortex-MLive Day 19The memory map & buses — AHB, APB, AXILive Day 20The MPU — memory protectionLive Day 21The MMU & virtual memoryLive Day 22Caches in ARM — and why they matterLive Day 23TrustZone — security in the architectureLive Day 24System control — CP15 & coprocessorsLive Day 25The ARM boot process end to endLive
PHASE 4

Advanced (64-bit & beyond)

Day 26AArch64 — the 64-bit ARMv8-A register modelLive Day 27NEON & SIMD — data parallelismLive Day 28Floating point — the VFP unitLive Day 29Multicore, cache coherency & big.LITTLELive Day 30Performance & optimisation on ARMLive

New lessons publish daily. Roadmap may expand as the series grows.

Curious how ARM compares to the open ISA challenger? Read RISC-V vs ARM →

Finished ARM? Build real hardware next → FPGA from Scratch (free course)