Yesterday we learned ARM is one architecture, licensed everywhere. But a server CPU and a sensor's microcontroller have very different needs. So ARM splits its cores into three profiles — and knowing them is the map for everything ahead.
ARM defines three profiles, each a letter in the famous Cortex brand. They share the same core RISC philosophy from Day 1, but are tuned for completely different goals:
Runs rich OSes — Linux, Android, iOS. Has an MMU and virtual memory. High performance. Phones, tablets, laptops.
Deterministic, low-latency, safety-critical. Uses an MPU. Guarantees timing. Storage, modems, automotive, industrial.
Tiny, cheap, ultra-low-power. Fast interrupts via the NVIC. No MMU. Sensors, appliances, IoT, wearables.
Same engine maker, three vehicles. Cortex-A is a comfortable car that runs a full infotainment system (the OS). Cortex-R is an ambulance — it must arrive on time, every time (real-time guarantees). Cortex-M is an electric scooter — small, cheap, sips energy, does one job reliably.
These are the big cores. The defining feature is a Memory Management Unit (MMU), which provides virtual memory — the thing a modern OS needs to give every process its own protected address space. That's why Cortex-A runs Linux, Android and the like.
For servers, ARM extends this profile into the Neoverse line — many cores, huge bandwidth — powering chips like AWS Graviton.
Some systems care less about raw speed and more about predictability: a hard-drive controller, a 5G modem, an engine controller, a brake system. They must respond within a guaranteed time, every single time — that's real-time, and missing a deadline can be catastrophic.
This is where most people start learning ARM, and much of this course's hands-on examples will use it. Cortex-M is designed for microcontrollers: a whole computer (CPU + flash + RAM + peripherals) on one cheap, low-power chip.
| Feature | Cortex-A | Cortex-R | Cortex-M |
|---|---|---|---|
| Goal | Max performance | Guaranteed timing | Low power & cost |
| Memory protection | MMU (virtual memory) | MPU | Optional MPU |
| Runs | Linux / Android | RTOS / bare-metal | RTOS / bare-metal |
| Typical use | Phone, laptop, server | Modem, storage, auto | Sensor, IoT, appliance |
| Interrupts | GIC | Low-latency | NVIC (very fast) |
Decode any ARM core at a glance:
Cortex‑M4 → the letter is the profile (M = Microcontroller); the number is the model within that profile (higher ≈ newer/more capable). So Cortex-M0 is a tiny entry core, Cortex-M7 a fast one, Cortex-A78 a high-end application core. The number doesn't compare across profiles — an M7 and an A78 aren't on the same scale.
Many architecture details depend on profile. The MMU (Day 21) is an A-profile thing; the NVIC (Day 18) is M-profile; banked modes differ between them. When we say "on Cortex-M…" you'll now know exactly what world we're in.
Cortex-M7 tell you — and what does it not?Cortex-A is a large, high-performance core with an MMU that runs full OSes (phones/laptops). Cortex-M is a tiny, ultra-low-power microcontroller core without an MMU for deterministic real-time control (sensors/IoT).
ARM's server/data-centre line, built on the A profile but tuned for many-core throughput and bandwidth (e.g. AWS Graviton).
Cortex-M — it's the simplest, cheapest to get hands-on with, and most of this course's examples use it.