What are the data sizes in ARM?

ARM works with a byte (8 bits), a halfword (16 bits), a word (32 bits) and a doubleword (64 bits). Memory is byte-addressable, and dedicated load/store instructions move each size: for example LDRB loads a byte, LDRH a halfword and LDR a word.

What is the difference between little-endian and big-endian?

Endianness is the order in which the bytes of a multi-byte value are stored in memory. In little-endian, the least-significant byte is stored at the lowest address; in big-endian, the most-significant byte is at the lowest address. For the 32-bit value 0x12345678, little-endian stores 78 56 34 12 across increasing addresses, while big-endian stores 12 34 56 78. ARM can do both but is almost always run little-endian.

What is memory alignment in ARM?

Alignment means a data item's address is a multiple of its size - a word (4 bytes) at an address divisible by 4, a halfword at an even address. Aligned accesses are fast and always allowed; misaligned accesses can be slower or, depending on the configuration and instruction, cause an alignment fault. Keeping data aligned is good practice.

Is ARM little-endian or big-endian?

ARM is bi-endian - the architecture supports both - but in practice the vast majority of ARM systems, including Linux and Android on Cortex-A and almost all Cortex-M devices, run in little-endian mode.

DAY 4 · FOUNDATIONS

Memory, Data Types, Alignment & Endianness

By EcrioniX · Updated Jun 6, 2026

ARM is a load/store machine — so the moment you leave the registers, you're dealing with memory. Today: how ARM measures data, why alignment matters, and the famous endianness question that trips up every beginner.

1. Memory is just a giant array of bytes

To the CPU, memory is one enormous numbered list of bytes — each byte has an address (0, 1, 2, 3 …). "Byte-addressable" means every single byte has its own address. Bigger values simply occupy several consecutive bytes.

2. The four data sizes

Name	Size	Bytes	Typical load instruction
Byte	8 bits	1	`LDRB`
Halfword	16 bits	2	`LDRH`
Word	32 bits	4	`LDR`
Doubleword	64 bits	8	`LDRD` / `LDP` (A64)

Notice ARM's word is 32 bits, not 16 (that habit comes from older x86 docs). A "word" on ARM = 4 bytes, always. We'll meet these load/store instructions properly on Day 10.

3. Alignment — keep data on tidy boundaries

An access is aligned when the address is a multiple of the data's size:

A word (4 bytes) → address divisible by 4 (0, 4, 8, 0xC…)
A halfword (2 bytes) → even address (0, 2, 4…)
A byte → any address (always aligned)

Aligned accesses are fast and always legal. Misaligned ones are either slower, or — depending on the core, the instruction, and a control bit — raise an alignment fault and crash. The lesson: keep your data aligned. Compilers do this for you; it matters when you cast pointers or pack structures by hand.

💡 Analogy

Think of memory as a shelf where books must start at marked slots. A 4-slot book placed neatly on a multiple-of-4 slot is grabbed in one motion. Jam it half-way between slots and the librarian either takes two trips… or refuses.

4. Endianness — which byte comes first?

Here's the classic puzzle. Store the 32-bit value 0x12345678 at address 0x100. It needs 4 bytes — but in what order? Two valid answers exist:

Value0x12345678 (12 = most significant byte)

Little-endian

780x100

560x101

340x102

120x103

Big-endian

120x100

340x101

560x102

780x103

Little-endian = Least-significant byte at the Lowest address (handy mnemonic). Bytes look "reversed" in a memory dump.
Big-endian = most-significant byte first — reads naturally left-to-right, like we write numbers.

ARM is bi-endian (it supports both), but in the real world it's almost always run little-endian — Linux, Android, and virtually all Cortex-M devices. Big-endian still appears in some networking gear (network byte order is big-endian).

✅ Why endianness will bite you

It only matters when bytes cross a boundary — saving binary to a file, sending over a network, or casting a int* to a char*. Two machines of different endianness reading the same bytes get different numbers. That's why protocols define a byte order explicitly.

5. Seeing it in C

// on a little-endian ARM: uint32_t x = 0x12345678; uint8_t* p = (uint8_t*)&x; // p[0]=0x78 p[1]=0x56 p[2]=0x34 p[3]=0x12 // the bytes are stored low-to-high → "reversed" in a dump

If that p[0] == 0x78 surprised you, you've just felt endianness for the first time. On a big-endian machine, p[0] would be 0x12.

🎯 Day 4 takeaways

Memory is byte-addressable; sizes are byte (8), halfword (16), word (32), doubleword (64).
An ARM word = 32 bits (4 bytes).
Alignment: keep data on multiples of its size — aligned = fast & safe; misaligned = slow or faults.
Little-endian = LSB at lowest address (ARM's normal mode); big-endian = MSB first.
Endianness only matters when bytes cross a boundary (files, networks, pointer casts).

Quick check

How many bytes does a "word" take on ARM?
Store 0xAABBCCDD at 0x200 little-endian — what byte is at 0x200?
Is a word access to address 0x1002 aligned? Why or why not?

FAQ

What are ARM's data sizes?

Byte (8), halfword (16), word (32), doubleword (64). Memory is byte-addressable; LDRB/LDRH/LDR load each size.

Little-endian vs big-endian?

The byte order of multi-byte values. Little-endian puts the least-significant byte at the lowest address; big-endian the most-significant. ARM usually runs little-endian.

Why does alignment matter?

Aligned accesses (address divisible by size) are fast and always allowed; misaligned ones can be slower or fault.

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