What are data-processing instructions in ARM?

Data-processing instructions are the arithmetic and logic operations performed by the ALU on values in registers - moves (MOV, MVN), arithmetic (ADD, ADC, SUB, RSB, SBC), logic (AND, ORR, EOR, BIC) and the compares (CMP, CMN, TST, TEQ). They follow the form Operation, optional condition, optional S, destination register, first operand register, and a second operand.

What does the S suffix do in ARM instructions?

The S suffix tells a data-processing instruction to update the condition flags N, Z, C and V in the CPSR based on its result. Without S, the instruction computes its result but leaves the flags unchanged. For example ADD does not touch the flags, while ADDS does. CMP and TST always set flags - they are effectively SUBS and ANDS that discard the result.

What is Operand2 in an ARM instruction?

Operand2 is the flexible second operand of a data-processing instruction. It can be an immediate constant (such as hash 5), a register (such as r2), or a register with a shift or rotate applied for free by the barrel shifter (such as r2, LSL hash 2). This flexibility is a hallmark of the ARM instruction set.

What is the difference between CMP and SUB in ARM?

SUB computes a subtraction and stores the result in a register. CMP performs the same subtraction but discards the result and only updates the condition flags - it is used purely to compare two values before a conditional branch. Similarly TST is an AND that only sets flags.

DAY 8 · THE INSTRUCTION SET

Data-Processing Instructions — MOV, ADD, SUB & Logic

By EcrioniX · Updated Jun 6, 2026

Time to write real instructions. The data-processing instructions are the ALU's everyday work — moving, adding, subtracting and logic. Learn their one shared format and you can read most ARM assembly.

1. The one format to rule them all

Almost every data-processing instruction follows the same shape:

OP{cond}{S} Rd, Rn, Operand2

OP — the operation (ADD, SUB, MOV…).
{cond} — optional condition (Day 11) — run only if a flag condition holds.
{S} — optional: update the NZCV flags from the result.
Rd — destination register (where the result goes).
Rn — first operand register.
Operand2 — the flexible second operand: an immediate, a register, or a shifted register.

ADD r0, r1, r2 ; r0 = r1 + r2 ADD r0, r1, #5 ; r0 = r1 + 5 (immediate Operand2) SUB r3, r3, #1 ; r3 = r3 - 1 (decrement)

2. The everyday instructions

Group	Instr	Meaning
Move	MOV Rd, Op2	Rd = Op2
Move	MVN Rd, Op2	Rd = NOT Op2 (bitwise invert)
Arithmetic	ADD Rd, Rn, Op2	Rd = Rn + Op2
	ADC Rd, Rn, Op2	add with carry (for >32-bit)
	SUB Rd, Rn, Op2	Rd = Rn − Op2
	RSB Rd, Rn, Op2	reverse subtract: Op2 − Rn
Logic	AND Rd, Rn, Op2	bitwise AND
	ORR Rd, Rn, Op2	bitwise OR
	EOR Rd, Rn, Op2	bitwise XOR
	BIC Rd, Rn, Op2	bit clear: Rn AND (NOT Op2)

RSB (reverse subtract) exists because Operand2 is the flexible one — RSB r0, r1, #0 negates r1. BIC is the clean way to clear specific bits: BIC r0, r0, #0xF clears the low nibble.

3. The S suffix — set the flags

By default, arithmetic/logic instructions compute a result and leave the CPSR flags untouched. Add S and they update N, Z, C, V (the flags from Day 3):

ADD r0, r1, r2 ; result only — flags unchanged ADDS r0, r1, r2 ; result AND update N Z C V SUBS r3, r3, #1 ; decrement and set Z when it hits 0

That SUBS is the classic loop counter: subtract 1, and the Z flag tells you when you've reached zero. The S is what connects computation to decision-making (Day 11).

4. Compare instructions: CMP and TST

Often you want to test values without keeping a result — just set the flags. That's CMP and TST:

Instr	Does	Equivalent to
CMP Rn, Op2	flags from Rn − Op2	SUBS, result discarded
CMN Rn, Op2	flags from Rn + Op2	ADDS, discarded
TST Rn, Op2	flags from Rn AND Op2	ANDS, discarded
TEQ Rn, Op2	flags from Rn EOR Op2	EORS, discarded

CMP r0, #10 ; compare r0 with 10 (sets Z if equal) TST r0, #1 ; test bit 0 (sets Z if it's clear)

5. Loading constants — a heads-up

Because an ARM instruction is only 32 bits, the immediate field can't hold every possible 32-bit constant — it stores a limited pattern. Small/round constants work in MOV; arbitrary ones use a PC-relative load from a literal pool (we'll see it in Day 10) or the MOV/MOVT pair. The assembler's handy LDR r0, =0x12345678 picks the best method for you.

✅ The mental model

One format — OP{cond}{S} Rd, Rn, Operand2 — covers move, add, subtract and logic. Operand2 is the flexible part. S turns a calculation into something the next branch can react to. CMP/TST set flags without keeping a result.

🎯 Day 8 takeaways

Format: OP{cond}{S} Rd, Rn, Operand2.
Move: MOV/MVN; arithmetic: ADD/ADC/SUB/RSB; logic: AND/ORR/EOR/BIC.
Operand2 = immediate, register, or shifted register.
S suffix updates the N Z C V flags; without it, flags are untouched.
CMP/CMN/TST/TEQ = set flags only (SUBS/ADDS/ANDS/EORS with the result discarded).

Quick check

What's the difference between ADD and ADDS?
Write one instruction to clear the lowest 4 bits of r0.
Why use CMP instead of SUBS when you only want to compare?

FAQ

What are data-processing instructions?

The ALU operations on registers — MOV/MVN, ADD/ADC/SUB/RSB, AND/ORR/EOR/BIC, and the compares CMP/CMN/TST/TEQ.

What does the S suffix do?

It makes the instruction update the N Z C V flags from its result. Without S, the flags stay unchanged.

CMP vs SUB?

SUB keeps the result; CMP does the same subtraction but only sets flags (result discarded) for comparing before a branch.

← Back to the full course roadmap